Automated test equipment (ATE) is used to test digital circuits and devices such as NAND devices (e.g., NAND Flash) and DRAM (dynamic random access memory). The ATE includes pin electronics modules (PEMs) that, generally speaking, receive a test pattern and conduct the test pattern to a unit (e.g., a circuit or device) under test. To increase throughput, multiple units can be tested in parallel. Hence, the ATE can include multiple PEMs (e.g., 48 PEMs).
Each PEM is programmed via its own serial bus; there is a respective serial bus per PEM. Each serial bus utilizes multiple input/output (I/O) pin(s) (e.g., four pins) on a controller. Thus, conventionally, 48 PEMs can require 48 buses and 192 pins.
Therefore, conventional ATE can be problematic because they rely on a relatively large number of buses, consuming resources such as physical area and I/O pins, and increasing costs. Also, the number of PEMs may be limited by the number of pins that are available and by the difficulty in routing larger numbers of serial buses.